13: BIT SHIFT / ROTATE INSTRUCTIONS
13-2 OPENNET CONTROLLER USER’S MANUAL
Examples: SFTL
• Data Type: Word
• Data Type: Double Word
M8120
REP
M8120 is the initialize pulse special internal relay.
When the CPU starts operation, the MOV (move) instruction sets 43690
to data register D10.
Each time input I0 is turned on, 16-bit data of data register D10 is
shifted to the left by 1 bit as designated by operand bits. The last bit sta-
tus shifted out is set to a carry (special internal relay M8003). Zeros are
set to the LSB.
0Before shift: D10 = 43690 1 1 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10
1After first shift: D10 = 21844 01 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10
Bits to shift = 1
SOTU
I0
S1 –
43690
D1 –
D10
S1
D10
bits
1
0
00 0111 0 1 0 0 0111 0 00After second shift: D10 = 43688
CY
M8003
MSB LSB
D10
SFTL(W)
MOV(W)
Shift to the left
Each time input I1 is turned on, 32-bit data of data registers D10 and
D11 is shifted to the left by 1 bit as designated by operand bits.
The last bit status shifted out is set to a carry (special internal relay
M8003). Zeros are set to the LSB.
Bits to shift = 1
SOTU
I1
S1
D10
bits
1
SFTL(D)
0
Before shift: D10·D11 = 2,863,311,530
1 1 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10·D11
1
After shift: D10·D11 = 1,431,655,764
01 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10·D11
Shift to the left
11 1000 1 0 1 1 1000 1 0
1 1 1000 1 0 1 1 1000 1 0
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