203
4
4 Instructions 4.5.4 Data Rotation and Shift
◆
Operands
Operand
Bit Element Word Element
System·User System·User Bit Designation Indexed Address Constant
Real
Number
S X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
D X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
n1 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
n2 X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
Note: The elements in gray background are supported.
◆
Function
n1 word variables from head address D are shifted n2 word places to the left, to accommodate n2 word
variables from head address S that ll the lower words.
The instruction of the pulse execution type is generally used.
Example:
X20
ķ
D 13~D 10
Overflow
ĸ
D 17~D 14
D 13~D 10
Ĺ
D 21~D 18
D 17~D 14
ĺ
D 25~D 22
D 21~D 18
Ļ
D 3D 0
D 25~D 22
D25 D24
D0D1
D2
D3
D10D11D12D13
D14
D15D16
D17
D18D19D20D21D22D23
ĺĹĸ
ķ
Ļ
ǒWSFLP D0 D10 K16 K4Ǔ
S
D n1 n2
~
Shift of every four bits to the right
SFWR: FIFO data write
◆
Overview
When driving conditions are met, the SFWR instruction writes the current content of S to a data register
with a length of n from head address D+1. The value of the pointer D is incremented by 1 each time a data
entry is written to the database.
SFWR S D n
FIFO data write Applicable model:
H3U
S Data source
Data to be written, or address of the word element that
stores the data
16-bit instruction (7
steps)
SFWR: Continuous
execution
SFWRP: Pulse
execution
D
Data area
head
address
Head address of word elements that store the data in a
data area
n
Data area
length
Length of a data area, including pointer data
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