Inovance H3U Series - Page 205

204
4
4 Instructions4.5.4 Data Rotation and Shift
◆
Operands
Operand
Bit Element Word Element
System·User System·User Bit Designation Indexed Address Constant
Real
Number
S X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
D X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
n X Y M T C S SM D R T C SD KnX KnY KnM KnS KnSM
V,Z
Modication K H E
Note: The elements in gray background are supported.
◆
Function
The content of S is written to a rst in rst out (FIFO) queue with a length of n from head address D. The
operand with the rst number stores a pointer. When the instruction is executed, the pointer is incremented
by 1 and then the content of the source operand (S) is written to the FIFO queue (D). The position of
insertion into the queue is specied by the pointer.
The instruction of the pulse execution type is generally used.
Example:
X
0
D
0
D
1
D 2D
3
D
4
D
5
D
6
D 7
D
8
D 9D 10
Indicator
ǒSFWRP D0 D1 K10Ǔ
FIFO data write instruction
S
D
n
3 1
When X0 = 1, a data entry in D0 is written to D2 and the value in D1 changes to 1. When X0 switches from
OFF to ON, another data entry in D0 is written to D3 and the value in D1 changes to 2, and so on. If the
value in D1 exceeds the value of n minus 1, insertion into the FIFO queue is stopped. The carry ag M8022
is set to 1 to identify this situation.
SFRD: FIFO data read
◆
Overview
When driving conditions are met, the SFRD instruction reads the data from head address S+1 in a data
register with a length of n. The read data is written to the destination register D.
SFRD S D n
FIFO data read Applicable model:
H3U
S
Data area
head
address
Head address of word elements that store the data in a
data area
16-bit instruction
(7 steps)
SFRD:
Continuous
execution
SFRDP: Pulse
execution
D Read data Address for storing read data
n
Data area
length
Length of a data area