25 HIGH-SPEED INPUT/OUTPUT FUNCTION
25.1 High-speed Counter Function
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■FX5U/FX5UC CPU module
• The input circuit has restrictions for maximum frequency.
*1 The number in is the head input number for each high-speed pulse input/output module.
• If input response time is set, maximum frequency is affected by the setting value.
• Under ordinary circumstances, the internal clock counts at 1 MHz (fixed) during operation.
Matched output performance
■CPU module
If output is to Y0 to Y17 using high-speed comparison instructions (DHSCS, DHSCR, DHSZ instruction), high-speed
comparison table, or multiple point output high-speed comparison table, time from pulse inputcomparison of count value
(match)output to Y is follows.
• FX5S/FX5UJ CPU module: 10s + input response time
• FX5U/FX5UC CPU module: 5s + input response time
If output is to Y20 or subsequent, time from pulse input to output is affected by communication and user interrupt.
■High-speed pulse input/output module
The matched output from the high-speed comparison table is possible only in the same module.
The time from pulse inputcomparison of count value (match)output to Y is 5 s + the input response time.
■Operation diagram
An operation diagram is shown below. (Comparison value: 5)
Count range
-2147483648 to +2147483647. These are signed 32-bit ring counters.
Ring length setting is however in the range of 0 to 2147483647.
Counter type Maximum frequency
1 phase, 1 input counter (S/W) 200 kHz
1 phase, 1 input counter (H/W) 200 kHz
1 phase, 2 input counter 200 kHz
2 phase, 2 input counter [1 edge count] 200 kHz
2 phase, 2 input counter [2 edge count] 100 kHz
2 phase, 2 input counter [4 edge count] 50 kHz
Internal clock 1 MHz (fixed)
FX5UJ CPU module Maximum frequency
X0, X1, X3, X4 100 kHz
X2, X5, X6, X7 10 kHz
FX5U-32M, FX5UC-32M FX5U-64M, FX5U-80M,
FX5UC-64M, FX5UC-96M
High-speed pulse input/output
module
*1
Maximum frequency
X0 to X5 X0 to X7 X to X+5 200kHz
X6 to X17 X10 to X17 X+6, X+7 10 kHz
ON
OFF
ON
OFF
Pulse input
Output (Y)
5μs + the input
response time