Tektronix TDS5052 - Page 294

Appendix A: Specifications
TDS5000 Series User Manual
A-15
Table A- 4: Trigger specifications (Cont.)
Characteristic Description
Advanced trigger timing For vertical scale settings ≥10 mV/div and ≤1V/div
Minimum recognizable
event width or time
Minimum re-arm time to
recognize next event
Glitch type Minimum glitch width = 1 ns 2 ns + 5% of glitch width
setting
Runt or Window type Minimum runt width =
2ns
2ns
Runt or Window type (time
qualified)
Minimum runt width =
2ns
8.5 ns + 5% of runt width
setting
Runt or Window type (logic
qualified)
Minimum runt width =
2ns
8.5 ns + 5% of runt width
setting
Width type Minimum difference be-
tween upper and lower
limits = 1 ns
2 ns + 5% of upper limit
setting
Timeout type Minimum timeout time =
1ns
2 ns + 5% of timeout set-
ting
Transition type Minimum transition time =
600 ps
8.5 ns + 5% of transition
time setting
Pattern type, typical Minimum time the pattern is
true = 1 ns
1ns
State type, typical Minimum true time before
clock edge = 1 ns
Minimum true time after
clock edge = 1 ns
1ns
Setup/Hold type, typical Minimum clock pulse width
from active edge to inactive
edge
Minimum clock pulse width
from inactive edge to active
edge
3 ns + hold time sett ing 2ns
Setup and Hold parameters Limits
Setup time (time from data
transition to clock edge)
--100 ns minimum
+100 ns maximum
Hold time (time from clock
edge to data transition)
--1 ns minimum
+102 ns maximum
Setup time + Hold time
(algebraic sum of the two
settings)
+2 ns minimum
+202 ns maximum
Advanced trigger timer ranges Limits
Glitch type 1nsto1s