Analog Devices ADRV9002

UG-1828 Preliminary Technical Data
Rev. PrB | Page 58 of 277
Table 18. CMOS SSI Timing Specification
CMOS SSI Timing Description
CMOS Rx t
DELAY
Maximum 5 ns Clock to strobe/data delay
CMOS Tx t
SETUP
Minimum 2 ns Strobe/data setup to clock
CMOS Tx t
HOLD
Minimum 2 ns Strobe/data hold after clock
Table 19. LVDS SSI Timing Specification
LVDS SSI Timing Description
Rx t
DELAY
(Maximum) 200 ps Clock to strobe/data delay
Tx t
SETUP
(Minimum) 200 ps Strobe/data setup to clock
Tx t
HOLD
(Minimum) 300 ps Strobe/data hold after clock
CSSI/LSSI TESTABILITY AND DEBUG
ADRV9001 SSI has built-in test pattern generator and test pattern checker which can help users to quickly test and debug the SSI
interface between the ADRV9001 and the baseband processor. Figure 52 illustrates the ADRV9001 SSI testability and debug diagram
with a baseband processor.
DAC
TX1
DATA PATH
TX1 SSI TX1 SSI
TEST
PATTERN GEN
TEST
PATTERN GEN
USER Tx DATA
BASEBAND PROCESSOR
USER Tx DATA
USER Rx DATA
DEBUG
LOGIC
DAC
TX2
DATA PATH
TX2 SSI TX2 SSI
LVDS/
CMOS
SSI
INTERFACE
DEBUG
LOGIC
DEBUG
LOGIC
ADC
RX1
DATA PATH
RX1 SSI TX1 SSI
TEST
PATTERN GEN
USER Rx DATA
DEBUG
LOGIC
ADC
RX2
DATA PATH
RX2 SSI
TX2 SSI
24159-053
Figure 52. ADRV9001 SSI Testability and Debug Diagram
The ADRV9001 receive SSI can generate ramp or PRBS (LSSI only) pattern and replace the receive channel data to baseband processor
when enable the receive debug function, users can check the specified test pattern at their SSI output to test if the receive SSI works well.
The ADRV9001 transmit SSI has a ramp and PRBS (LSSI only) pattern checker, users can transmit ramp or PRBS pattern rather than
user transmit data via SSI to ADRV9001 to verify if transmitter SSI works well. Moreover, ADRV9001 transmit SSI always monitors the
TX_STROBE_IN signal validity according to the SSI work modes and reports the error flag if finds the strobe misalignment.
The ADRV9001 transmit SSI data output can be loopback to receive SSI data input when transmit and receive SSI runs at same clock
rate, users can use their pattern generator and checker to verify if the whole system SSI works well.
As mentioned previously, the SSI clock, strobe and data have programmable delay, this helps users to meet the timing spec that described
in SSI Timing Parameters.