Preliminary Technical Data UG-1828
Rev. PrB | Page 81 of 277
Make all ADRV9002 chips and channels of interest to MCS READY substate by issuing adi_adrv9001_Radio_ToMcsReady(). This
function will transition all ADRV9002 channels from the CALIBRATED state to MCS READY substate. This is necessary before issuing
all MCS pulses.
2. Configure MCS
BBIC or clock chip will configure MCS with 6 pulses as inputs to ADRV9002 MCS pin by adi_fpga9001_Mcs_Configure(). The timing
for these pulses is specified as in Table 31. This will be a BBIC specific function implemented by the user.
adi_fpga9001_Mcs_Configure() is an example in the SDK provided for the EVB system FPGA board. Here user needs to specify the
pulse width and wait time and make sure they don’t exceed the minimum requirement.
3. Start MCS
Once the MCS pulses are configured, BBIC or clock chip starts to send 6 MCS pulse simultaneously on all the ADRV9002 chips by
adi_fpga9001_Mcs_Start(). This is also a BBIC specific function. adi_fpga9001_Mcs_Start() is an example in the SDK provided for the
EVB system FPGA board. While MCS is running, ADRV9002 should be in MCS transition substate.
4. MCS done
After all 6 pulses are received, MCS will be finished. At this point, ADRV9002 should be in MCS DONE substate.
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