4 Data Transfer
4 – 10
The first type of connection is a one-way path from each bus to the other.
This is implemented with two tristate buffers connecting the DMD bus
with the upper 16 bits of the PMD bus. One of these two buffers is
normally used when data is exchanged between the program memory and
one of the registers connected to the DMD bus. This is the path used to
write data to program memory; it is not shown in the individual
computational unit block diagrams.
The second connection is through the PX register. The PX register is 8-bits
wide and can be loaded from either the lower 8 bits of the DMD bus or the
lower 8 bits of the PMD bus. Its contents can also be read to the lower 8
bits of either bus.
PX register access follows the principles described below.
From the PMD bus, the PX register is:
1. Loaded automatically whenever data (not an instruction) is read from
program memory to any register. For example:
AX0 = PM(I4,M4);
In this example, the upper 16 bits of a 24-bit program memory word
are loaded into AX0 and the lower 8 bits are automatically loaded into
PX.
2. Read out automatically as the lower 8 bits when data is written to
program memory. For example:
PM(I4,M4) = AX0;
In this example, the 16 bits of AX0 are stored into the upper 16 bits of a
24-bit program memory word. The 8 bits of PX are automatically
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