GR740-UM-DS, Nov 2017, Version 1.7 461 www.cobham.com/gaisler
GR740
B15 JTAG_TDO O LVCMOS 3.3 - JTAG
B16 JTAG_TDI I LVCMOS 3.3 - JTAG
B17 GPIO[7] IO LVCMOS 3.3 - GPIO
B18 GPIO[10] IO LVCMOS 3.3 - GPIO
B19 GPIO[6] IO LVCMOS 3.3 - GPIO
B20 GPIO[2] IO LVCMOS 3.3 - GPIO
B21 PCIMODE_ENABLE I LVCMOS 3.3 - High Bootstrap
B22 PLL_BYPASS[1] I LVCMOS 3.3 - High Bootstrap
B23 PLL_IGNLOCK I LVCMOS 3.3 - High Bootstrap
B24 PLL_LOCKED[4] O LVCMOS 3.3 - High Bootstrap
B25 GND Power/ground pin GND
C1 PROMIO_ADDR[10] O LVCMOS 3.3 - PROM
C2 PROMIO_ADDR[12] O LVCMOS 3.3 - PROM
C3 PROMIO_ADDR[7] O LVCMOS 3.3 - PROM
C4 PROMIO_ADDR[3] O LVCMOS 3.3 - PROM
C5 PROMIO_OEN O LVCMOS 3.3 - Low PROM
C6 PROMIO_DATA[15] IO LVCMOS 3.3 - PROM
C7 PROMIO_DATA[9] IO LVCMOS 3.3 - PROM
C8 PROMIO_DATA[5] IO LVCMOS 3.3 - PROM
C9 PROMIO_DATA[0] IO LVCMOS 3.3 - PROM
C10 GR1553_BUSBTXIN O LVCMOS 3.3 - High MIL-1553
C11 SPI_SCK IO LVCMOS 3.3 - SPI
C12 SPI_SEL I LVCMOS 3.3 - Low SPI
C13 SPI_SLVSEL[0] O LVCMOS 3.3 - Low SPI
C14 SPI_SLVSEL[1] O LVCMOS 3.3 - Low SPI
C15 GPIO[13] IO LVCMOS 3.3 - GPIO
C16 GPIO[9] IO LVCMOS 3.3 - GPIO
C17 GPIO[3] IO LVCMOS 3.3 - GPIO
C18 GPIO[1] IO LVCMOS 3.3 - GPIO
C19 DSU_ACTIVE O LVCMOS 3.3 - High Bootstrap
C20 MEM_IFWIDTH I LVCMOS 3.3 - Bootstrap
C21 VSS2V5 Power/ground pin VSS2V5
C22 VSS2V5 Power/ground pin VSS2V5
C23 VSS2V5 Power/ground pin VSS2V5
C24 VSS2V5 Power/ground pin VSS2V5
C25 VSS2V5 Power/ground pin VSS2V5
D1 PROMIO_ADDR[14] O LVCMOS 3.3 - PROM
D2 PROMIO_ADDR[16] IO LVCMOS 3.3 - PROM
D3 PROMIO_ADDR[11] O LVCMOS 3.3 - PROM
D4 PROMIO_ADDR[5] O LVCMOS 3.3 - PROM
D5 PROMIO_BRDYN I LVCMOS 3.3 - Low PROM
D6 PROMIO_DATA[13] IO LVCMOS 3.3 - PROM
D7 PROMIO_DATA[11] IO LVCMOS 3.3 - PROM
D8 PROMIO_DATA[3] IO LVCMOS 3.3 - PROM
Table 597.Pin assignment
Position Signal Name I/O Level
Vol t.
[V] Pull Polarity Note