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Fuji Electric FRENIC-VG Series - Page 286

Fuji Electric FRENIC-VG Series
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6-210
When using output from this printed board (OPC-VG1-FV or MCA-VG1-FV) to control the line speed or
motor speed (whichever prioritized) via FRENIC-VG, connect the voltage output terminal S4 to Ai1 (or
Ai2) and S10 to M (0V) on the inverter, and configure the parameter settings (*3) before use.
*1, *2 Output terminal specifications.
Refer to the "Hardware Specifications I/O Terminal Specifications" when using the option for other
purposes.
*3 Parameter setting example
(When inputting the line speed (F/V output) to Ai1 in controlling the line speed or motor speed
(whichever prioritized))
Refer to H53 in Chapter 4, Section 4.3 "Details of Function Codes" and perform the following
settings:
1. Set E49 "Ai1 FUNC" to "11".
2. Set H53 "N - FB SEL" to "3".
3. If the gain adjustment for line speed is necessary, use E53 "Ai1 GAIN".
(3) Complementary explanation of PG output form
(3)-1 Voltage Output
: Circuit to output from the collector side of the transistor earthed via
the emitter.
Figure 6.9.8 Voltage Output
(3)-2 Line driver: Signals are output in the positive or negative phase. Applied to
high-speed transmission.
Figure 6.9.9 Line Driver Output
(3)-3 Complementary: Constant-voltage output circuit with the emitter follower matched.
Applied to high-speed response and/or long-distance transmission.
Figure 6.9.10 Complementary Output
Output
0 V
V
CC
Out
p
ut
0 V
V
CC
Q
Q
0V

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