4-10 120 Series Maternal/Fetal Monitor Revision B
2015590-001
Theory of Operation: Main Motherboard
59 FECG 80db Input FECG Analog for Rear Panel Output
60 AGND Output Analog Ground
61 US1audio Input Ultrasound Channel One Audio
62 MECG 60db Input MECG Analog for Rear Panel
63 PACER/ Input Pacemaker Detect Line
64 TECG Output Telemetry ECG
65 TTOCO Output TOCO-telemetry
66 FM Output Fetal Movement
67 GND Output Digital Ground
68 D1B I/O Buffered Data Line
69 D3B I/O Buffered Data Line
70 D5B I/O Buffered Data Line
71 D7B I/O Buffered Data Line
72 D9B I/O Buffered Data Line
73 D11B I/O Buffered Data Line
74 +5V Output +5 Volt Logic Supply
75 D13B I/O Buffered Data Line
76 D15B I/O Buffered Data Line
77 A2B Output Buffered Address Line
78 A4B Output Buffered Address Line
79 A6B Output Buffered Address Line
80 A8B Output Buffered Address Line
81 GND Output Digital Ground
82 A10B Output Buffered Address Line
83 A12B Output Buffered Address Line
84 A14B Output Buffered Address Line
85 A16B Output Buffered Address Line
86 SP1B/ Output Spare Chip Select Line
87 SP3B/ Output Spare Chip Select Line
88 +5V Output Volt Logic Supply
Table 4-5. DSP Board Connector J7 (Continued)
Pin Number Signal Name
Signal Type
(Relative To Main
Motherboard)
Signal Description
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