Hioki 3196 - Terminology

Appendix
218
Terminology
LAN LAN is the abbreviation of Local Area Network. The LAN was devel-
oped as a network for transferring data through a PC within a local
area, such as an office, factory, or school.
This device comes equipped with the LAN adapter Ethernet 10Base-T.
10Base-T is appointed by IEEE802 and has a data transfer speed of
10 Mbps. Use a twisted-pair cable to connect this device to the hub
(central computer) of your LAN. The maximum length of the cable con-
necting the terminal and the hub is 100 m. Similar to the RS-232C
interface protocol, the LAN interface protocol supports communica-
tions using TCP/IP.
RS-232C The RS-232C is a serial interface established by the EIA (Electronics
Industries Association), and conforms to the specifications for DTE
(data terminal equipment) and DCE (data circuit terminating equip-
ment) interface conditions.
Using the signal line part of the RS-232C specifications with this unit
allows you to use an external printer, PC, or modem.
When using a PC or modem, the RS-232C interface supports commu-
nications using TCP/IP as the RS-232C protocol. TCP/IP is widely
used as a LAN protocol and is the basic protocol used on the Internet.
These specifications are available to the public on the Internet in a
document called RFC. (ftp://ds.internic.net/rfc)
PLL PLL is the abbreviation of Phase Locked Loop and is a phase synchro-
nization circuit.
This unit is synchronized with the fundamental cycle (at 50 or 60 Hz)
and samples voltage and current input waveforms at a frequency of
256 samples per cycle. This is an effective input waveform sampling
method, used in analyzing harmonics by FFT when sampling at a fre-
quency of 256 samples per cycle.
Conventional measurement instruments could not sample the entire
input waveform unless it was input with PLL (PLL source), therefore
they could not calculate the input waveform. This condition is called
PLL unlock.
However, when no PLL source is found during measurement with this
device, it momentarily switches to the internal clock. The internal clock
is synchronized with a frequency of 256 samples per cycle, the same
as the frequency prior to the occurrence of PLL unlock. Using this
function, sampling is not possible when interruptions occur, but you
can search the waveform for interruptions.
However, it is still possible to calculate harmonics correctly without a
PLL source input because during harmonics analysis a rectangular
window open on the waveform for FFT (10 cycles at 50 Hz or 12
cycles at 60 Hz).
As a warning, PLL synchronization on the SYSTEM settings display
area of the screen or the frequency source area light red.