Intel 386 User Manual

5-27
DEVICE CONFIGURATION
Figure 5-18. Port 3 Configuration Register (P3CFG)
Port 3 Configuration
P3CFG
(read/write)
Expanded Addr:
ISA Addr:
Reset State:
F824H
—
00H
7 0
PM7 PM6 PM5 PM4 PM3 PM2 PM1 PM0
Bit
Number
Bit
Mnemonic
Function
7 PM7 Pin Mode:
0 = Selects P3.7 at the package pin.
1 = Selects COMCLK at the package pin.
6 PM6 Pin Mode:
0 = Selects P3.6 at the package pin.
1 = Selects PWRDOWN at the package pin.
5 PM5 Pin Mode:
0 = Selects P3.5 at the package pin.
1 = Connects master IR7 to the package pin (INT3).
4 PM4 Pin Mode:
0 = Selects P3.4 at the package pin.
1 = Connects master IR6 to the package pin (INT2).
3 PM3 Pin Mode:
0 = Selects P3.3 at the package pin.
1 = Connects master IR5 to the package pin (INT1).
2 PM2 Pin Mode:
0 = Selects P3.2 at the package pin.
1 = Connects master IR1 to the package pin (INT0).
1 PM1 Pin Mode:
See Table 5-1 on page 5-8 for all the PM1 configuration options.
0 PM0 Pin Mode:
See Table 5-1 on page 5-8 for all the PM0 configuration options.

Intel 386 Specifications

General

Architecture	x86
Clock Speed	12 MHz to 40 MHz
Transistor Count	275, 000
Data Bus Width	32-bit
Address Bus Width	32-bit
Instruction Set	x86
Introduced	1985
Maximum Memory	4 GB
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
MMU	Yes
Voltage	5V
Model	Intel 386
Package	PGA
Process	1.5 μm to 1 μm