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Intel 386 User Manual

Intel 386
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14-21
CHIP-SELECT UNIT
14.5 DESIGN CONSIDERATIONS
When designing with the CSU, consider the following:
Upon reset, UCS# is configured as a 16-bit chip-select signal. If the Boot device is only an
8-bit device, then BS8# must be asserted whenever UCS# is active (until the UCS channel
can be reprogrammed to reflect an 8-bit region). One way of doing this is by connecting the
UCS# pin directly to the BS8# pin, if there are no other devices that need to use the BS8#
pin. If UCS# is tied directly to BS8#, then the UCS channel need not be programmed to
reflect an 8-bit region.
If the Port92 CPU-only RESET is used (described in Chapter 5), the UCS channel must
remain enabled for the top of the memory address space (a CPU-only RESET does not
affect the chip-select registers) and therefore, the UCS channel does not re-initialize to its
reset state.
If arbitrary chip-select regions are required to access external memory and I/O devices and
a single channel can not be programmed to accommodate the address space of these
regions, multiple chip-select signals can be ORed” to create a single chip-enable to a
device. For example a 512 Kbyte region chip-select signal starting on a 256 Kbyte boundary
can be created by ORing” two 256 Kbyte chip-select signals.
Refer to Chapter 6 (“Design Considerations” on page 6-38) for examples of using chip-
select signals to access external devices.

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Intel 386 Specifications

General IconGeneral
Architecturex86
Clock Speed12 MHz to 40 MHz
Transistor Count275, 000
Data Bus Width32-bit
Address Bus Width32-bit
Instruction Setx86
Introduced1985
Maximum Memory4 GB
Operating ModesReal mode, Protected mode, Virtual 8086 mode
MMUYes
Voltage5V
ModelIntel 386
PackagePGA
Process1.5 μm to 1 μm

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