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Intel 386

Intel 386
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12-15
DMA CONTROLLER
Figure 12-8. Single Data-transfer Mode with Single Buffer-transfer Mode
A2331-02
After initialization, the DMA channel is
programmed with the requester and
target addresses and a byte count.
Buffer transfer is complete, so channel
becomes idle.
Yes
No
DREQ
n
active?
Yes
No
Byte
count = FFFFFFH
or EOP#
active?
DMA channel relinquishes bus control.
DMA transfers one byte or word of data
and decrements the byte count.
DMA gains bus control.

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