Intel 386 User Manual

Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
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14.4.2 Port 2 Configuration Register (P2CFG)
Use P2CFG bits 4–0 to connect the CS4:0# signals to package pins.
Figure 14-5. Port 2 Configuration Register (P2CFG)
Port 2 Configuration
P2CFG
(read/write)
Expanded Addr:
ISA Addr:
Reset State:
F822H
—
00H
7 0
PM7 PM6 PM5 PM4 PM3 PM2 PM1 PM0
Bit
Number
Bit
Mnemonic
Function
7 PM7 Pin Mode:
0 = Selects P2.7 at the package pin.
1 = Selects CTS0# at the package pin.
6 PM6 Pin Mode:
0 = Selects P2.6 at the package pin.
1 = Selects TXD0 at the package pin.
5 PM5 Pin Mode:
0 = Selects P2.5 at the package pin.
1 = Selects RXD0 at the package pin.
4 PM4 Pin Mode:
0 = Selects P2.4 at the package pin.
1 = Selects CS4# at the package pin.
3 PM3 Pin Mode:
0 = Selects P2.3 at the package pin.
1 = Selects CS3# at the package pin.
2 PM2 Pin Mode:
0 = Selects P2.2 at the package pin.
1 = Selects CS2# at the package pin.
1 PM1 Pin Mode:
0 = Selects P2.1 at the package pin.
1 = Selects CS1# at the package pin.
0 PM0 Pin Mode:
0 = Selects P2.0 at the package pin.
1 = Selects CS0# at the package pin.

Intel 386 Specifications

General

Architecture	x86
Clock Speed	12 MHz to 40 MHz
Transistor Count	275, 000
Data Bus Width	32-bit
Address Bus Width	32-bit
Instruction Set	x86
Introduced	1985
Maximum Memory	4 GB
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
MMU	Yes
Voltage	5V
Model	Intel 386
Package	PGA
Process	1.5 μm to 1 μm