Intel 386 User Manual

7-19
SYSTEM MANAGEMENT MODE
_SetEXRegByte(SIOPortBase + DLH, HIBYTE(BaudDivisor) );
_SetEXRegByte(SIOPortBase + DLL, LOBYTE(BaudDivisor) );
// Set Serial Line control register
_SetEXRegByte(SIOPortBase + LCR, Mode); // Sets Mode and resets the
// Divisor latch
// Set modem control bits
_SetEXRegByte(SIOPortBase + MCR, ModemCntrl);
return E_OK;
}
/******************************* MAIN ***********************************/
Parameters:
None
Returns:
None
Assumptions:
None
Real/Protected Mode
No changes required.
--------------------------------------------------------------------------*/
#ifndef SetEXRegWordInline
#define SetEXRegWordInline(address, word) \
_asm mov dx, address; \
_asm mov ax, word; \
_asm out dx, ax;
#endif
void main(void)
{
InitSIO(SIO_PORT, // Which Serial Port
SIO_8N1, // Mode, 8-data, no parity, 1-stop
SIO_MCR_RTS+SIO_MCR_DTR, // Modem line controls
9600, // Baud Rate
BAUD_CLKIN); // Baud Clocking Rate
_asm // Store registers to preserve values
{
push DI
push SI
push DS
push ES
}
SetEXRegWordInline(CS4ADL, 0x702); // Configure chip select 4
SetEXRegWordInline(CS4ADH, 0x0);
SetEXRegWordInline(CS4MSKL, 0xFC01);
SetEXRegWordInline(CS4MSKH, 0x0);

Intel 386 Specifications

General

Architecture	x86
Clock Speed	12 MHz to 40 MHz
Transistor Count	275, 000
Data Bus Width	32-bit
Address Bus Width	32-bit
Instruction Set	x86
Introduced	1985
Maximum Memory	4 GB
Operating Modes	Real mode, Protected mode, Virtual 8086 mode
MMU	Yes
Voltage	5V
Model	Intel 386
Package	PGA
Process	1.5 μm to 1 μm