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Intel 386 User Manual

Intel 386
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Intel386™ EX EMBEDDED MICROPROCESSOR USERS MANUAL
1-2
Chapter 9 — Interrupt Control Unit — describes the interrupt sources and priority options and
explains how to program the interrupt control unit.
Chapter 10 — Timer/Counter Unit — describes the timer/counters and their available count
formats and operating modes.
Chapter 11 — Asynchronous Serial I/O (SIO) Unit — explains how to use the universal asyn-
chronous receiver/transmitters (UARTs) to transmit and receive serial data.
Chapter 12 — DMA Controller — describes how the enhanced direct memory access controller
allows internal and external devices to transfer data directly to and from the system and explains
how bus control is arbitrated.
Chapter 13 — Synchronous Serial I/O (SSIO) Unit — explains how to transmit and receive
data synchronously.
Chapter 14 — Chip-select Unit — explains how to use the chip-select channels to access vari-
ous external memory and I/O devices.
Chapter 15 Refresh Control Unit — describes how the refresh control unit generates peri-
odic refresh requests and refresh addresses to simplify the interface to dynamic memory devices.
Chapter 16 — Input/Output Ports — describes the general-purpose I/O ports and explains how
to configure each pin to serve either as an I/O pin or as a pin controlled by an internal peripheral.
Chapter 17 — Watchdog Timer Unit — explains how to use the watchdog timer unit as a soft-
ware watchdog, bus monitor, or general-purpose timer.
Chapter 18 — JTAG Test-logic Unit describes the independent test-logic unit and explains
how to test the device logic and board-level connections.
Appendix A — Signal Descriptions — describes the device pins and signals and lists pin states
after a system reset and during powerdown, idle, and hold.
Appendix B — Compatibility with PC/AT* Architecture — describes the ways in which the
device is compatible with the standard PC/AT architecture and the ways in which it departs from
the standard.
Appendix C — Example Code Header Files contains the header files called by the code ex-
amples that are included in several chapters of this manual.
Appendix D System Register Quick Reference contains an alphabetical list of registers.
Appendix E Instruction Set Summary — lists all instructions and their clock counts.
Glossary — defines terms with special meaning used throughout this manual.
Index — lists key topics with page number references.

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Intel 386 Specifications

General IconGeneral
BrandIntel
Model386
CategoryComputer Hardware
LanguageEnglish

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