Intel 386

C-7
EXAMPLE CODE HEADER FILES
#define MPIN_INT0 0x4
#define MPIN_INT1 0x8
#define MPIN_INT2 0x10
#define MPIN_INT3 0x20
/* ICU Master External Cascade IRs */
#define MCAS_IR1 0x2
#define MCAS_IR2 0x4
#define MCAS_IR5 0x20
#define MCAS_IR6 0x40
#define MCAS_IR7 0x80
/* ICU Slave Pins */
#define SPIN_INT4 0x1
#define SPIN_INT5 0x2
#define SPIN_INT6 0x4
#define SPIN_INT7 0x8
/* ICU IRQ Mask Values*/
#define IR0 0x1
#define IR1 0x2
#define IR2 0x4
#define IR3 0x8
#define IR4 0x10
#define IR5 0x20
#define IR6 0x40
#define IR7 0x80
/* ICU EOI Types */
#define NONSPECIFIC_EOI 0x20
#define SPECIFIC_EOI 0x60
#define NonSpecificEOI() _SetEXRegByte(OCW2S,NONSPECIFIC_EOI);
_SetEXRegByte(OCW2M,NONSPECIFIC_EOI)
#define MstrSpecificEOI(irq) _SetEXRegByte(OCW2M, 0x60 | ((BYTE)((irq) & 0x7))
)
#define SlaveSpecificEOI(irq) _SetEXRegByte(OCW2S, 0x60 | ((BYTE)((irq) & 0x7))
)
#define Master 1
#define Slave 0
/* ICU Function Definitions */
extern int InitICU (BYTE MstrMode, BYTE MstrBase, BYTE MstrCascade,
BYTE SlaveMode, BYTE SlaveBase,BYTE MstrPins,
BYTE SlavePins);
extern int InitICUSlave(BYTE SlaveMode, BYTE SlaveBase, BYTE SlavePins);
extern void SetInterruptVector(void (far interrupt *IntrProc)(void),
int Vector, int IntrType);
extern int SetIRQVector(void (far interrupt *IntrProc)(void), int IRQ,
int IntrType);
extern void Enable8259Interrupt(BYTE MstrMask, BYTE SlaveMask);
extern void Disable8259Interrupt(BYTE MstrMask, BYTE SlaveMask);
extern int Poll_Command(int Master_or_Slave);