Design Guide 179
Intel
®
855GME Chipset and Intel
®
82801DB ICH4 Embedded Platform Design Guide
AGP Port Design Guidelines
7.2.6 AGP Routing Ground Reference
Intel strongly recommends that at least the following critical signals be referenced to ground from
the GMCH to an AGP controller connector using a minimum number of vias on each net:
• AD_STB0
• AD_STB0#
• AD_STB1
• AD_STB1#
• SB_STB
• SB_STB#
• G_TRDY#
• G_IRDY#
• G_GNT#
• ST[2:0]
GAD18 L3 541 GCBEB_3 J5 518
GAD19 K5 489 GST_0 C4 750
GAD20 K1 692 GST_1 C3 797
GAD21 K3 622 GST_2 C2 856
GAD22 K2 685 GRBFB D3 962
GAD23 J6 536 GWBFB D2 947
GAD24 H1 772 GFRAMEB M6 486
GAD25 H2 720 GIRDYB K7 751
GAD26 H4 625 GTRDYB N7 350
GAD27 H3 649 GSTOPB P7 423
GAD28 G3 762 GDEVSELB N6 399
GAD29 H6 521 GREQB B3 762
GAD30 G2 712 GGNTB B2 849
GAD31 H5 566 GPAR L7 623
Table 63. AGP Interface Package Lengths (Sheet 2 of 2)
Signal
Pin
Number
Package
Length (mils)
Signal Pin Number
Package
Length (mils)
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