January 2007 29
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
System Overview
• Intel
®
Celeron
®
M Processor Ultra Low Voltage at 600 MHz (130 nm, 600 MHz, 400 MHz
FSB):
— On-die 512-KB L2 Cache
—TDP = 7 W
— VCC-CORE: 1.004 V
—V
CCA
: 1.8 V supported
— 479-ball micro FCBGA package
2.3.6 Intel
®
855GME Chipset Graphics Memory Controller Hub
(82855GME)
2.3.6.1 Intel
®
Pentium
®
M Processor/Intel
®
Celeron
®
M Processor Support
• Optimized for the Pentium M processor/Celeron M processor in 478-pin micro-FCPGA and
479-ball micro-FCBGA package
• AGTL+ bus driver technology with integrated GTL termination resistors (gated AGTL+
receivers for reduced power)
• Supports 32-bit AGTL+ bus addressing (no support for 36-bit address extension).
• Supports Uni-processor (UP) systems.
• 400 MT/s Pentium M processor FSB support (100 MHz)
• 2X Address, 4X Data
• 12 deep in-order queue
2.3.6.2 Integrated System Memory DRAM Controller
• Supports up to two double-sided DIMMs (four rows populated) with unbuffered PC2100/
PC2700 DDR-SDRAM (with or without ECC)
• Supports 64 Mbit, 128 Mbit, 256 Mbit and 512 Mbit technologies for x8 and x16 width
devices
• Maximum of 2 Gbytes system memory by using 512 Mbit technology devices (double sided)
• Supports 266 MHz, and 333 MHz DDR devices
• 64-bit data interface (72-bit with ECC)
• 2100/2700 system memory interface
• Supports up to 16 simultaneous open pages
2.3.6.3 Internal Graphics Controller
• Graphics Core Frequency
— Display/Render frequency up to 250 MHz (with 1.35 V core voltage)
• 3D Graphics Engine
— 3D Setup and Render Engine