Intel 855GME User Manual

January 2007 67
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
4.1.8 Pentium
®
M/Celeron
®
M Processor GTLREF Layout and
Routing Recommendations
There is one AGTL+ reference voltage pin on the Intel Pentium M/Celeron M processor, GTLREF,
which is used to set the reference voltage level for the AGTL+ signals (GTLREF). The reference
voltage must be supplied to the GTLREF pin. The voltage level that needs to be supplied to
GTLREF must be equal to 2/3 * VCCP ± 2%. The GMCH also requires a reference voltage
(MCH_GTLREF) to be supplied to its HVREF[4:0] pins. The GTLREF voltage divider for both the
Intel Pentium M/Celeron M processor and GMCH cannot be shared. Thus, both the processor and
GMCH must have their own locally generated GTLREF networks. Figure 27 depicts the
recommended topology for generating GTLREF for the Intel Pentium M/Celeron M processor
using a R1 = 1 kΩ ±1% and R2 = 2kΩ ± 1% resistive divider.
Figure 26. Intel
®
Pentium
®
M/Celeron
®
M Processor and Intel
®
855GME Chipset GMCH
(82855GME) Host Clock Layout Routing Example
S
econdary
S
ide
L3
855GME
CPU
FROM
CK - 409
855GME
BCLK[1:0]
507mil on L8
ITP
FLEX
CPU
BCLK[1:0]
507mil on L8
ITP
BCLK[1:0]
ITP
INTERPOSER
BCLK[1:0]
507mil on L8
GND
Via

Intel 855GME Specifications

General

Brand	Intel
Model	855GME
Category	Computer Hardware
Language	English