3
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Contents
1 Introduction..................................................................................................................................21
1.1 Reference Documents........................................................................................................23
2 System Overview.........................................................................................................................25
2.1 Terminology........................................................................................................................25
2.2 System Features.................................................................................................................25
2.3 Component Features..........................................................................................................27
2.3.1 Intel
®
Pentium
®
M Processor ................................................................................27
2.3.1.1 Architectural Features............................................................................27
2.3.1.2 Packaging/Power...................................................................................27
2.3.2 Intel
®
Pentium
®
M Processor on 90 nm Process with 2 MB L2 Cache .................27
2.3.3 Intel
®
Celeron
®
M Processor.................................................................................28
2.3.4 Intel
®
Celeron
®
M Processor on 90 nm process ...................................................28
2.3.5 ULV Intel
®
Celeron
®
M Processor at 600 MHz......................................................28
2.3.6 Intel
®
855GME Chipset Graphics Memory Controller Hub (82855GME) ..............29
2.3.6.1 Intel
®
Pentium
®
M Processor/Intel
®
Celeron
®
M Processor Support ....29
2.3.6.2 Integrated System Memory DRAM Controller........................................29
2.3.6.3 Internal Graphics Controller...................................................................29
2.3.6.4 Packaging/Power...................................................................................31
2.3.7 Intel
®
6300ESB System Features..........................................................................31
2.3.8 Firmware Hub (FWH).............................................................................................31
2.3.8.1 Packaging/Power...................................................................................32
3 General Design Considerations.................................................................................................33
3.1 Nominal Board Stack-Up ....................................................................................................33
3.2 Alternate Stack-Ups............................................................................................................35
4Intel
®
Pentium
®
M/Celeron
®
M Processor FSB Design and Power Delivery Guidelines......37
4.1 Intel
®
Pentium
®
M/Celeron
®
M Processor FSB Design Recommendations.......................37
4.1.1 Recommended Stack-Up Routing and Spacing Assumptions...............................37
4.1.1.1 Trace Space to Trace – Reference Plane Separation Ratio..................37
4.1.1.2 Trace Space to Trace Width Ratio.........................................................38
4.1.1.3 Recommended Stack-up Calculated Coupling Model ...........................38
4.1.1.4 Signal Propagation Time-to-Distance Relationship and Assumptions...39
4.1.2 Common Clock Signals .........................................................................................40
4.1.2.1 Intel
®
Pentium
®
M/Celeron
®
M Processor Common Clock Signal
Package Length Compensation.............................................................41
4.1.3 Source Synchronous Signals General Routing Guidelines....................................42
4.1.3.1 Source Synchronous – Data Group .......................................................47
4.1.3.2 Source Synchronous – Address Group .................................................48
4.1.3.3 Intel
®
Pentium
®
M/Celeron
®
M Processor and Intel
®
855GME Chipset
GMCH (82855GME) FSB Signal Package Lengths...............................49
4.1.4 Length Matching Constraints .................................................................................55
4.1.4.1 Package Length Compensation.............................................................56
4.1.4.2 Trace Length Equalization Procedures..................................................56
4.1.5 Asynchronous Signals ...........................................................................................58
4.1.5.1 Topology 1A: Open Drain (OD) Signals Driven by the Intel
Pentium M/Celeron M Processor – IERR# ............................................59