Intel 855GME User Manual

268
Intel
®
855GME Chipset and Intel
®
6300ESB ICH Embedded Platform Design Guide
Schematic Checklist Summary
12.1.2 In Target Probe (ITP)
Table 116 presents the In Target Probe (ITP) information.
Figure 149. Voltage Translation Circuit for PROCHOT# (for Intel
®
Pentium
®
M/Celeron
®
M
Processor)
1.3K
+/-5%
555%
330ohm
+/-5%
5%
3.3V
To Receive
r
F
rom Driver
3904
3904
Q1
Q2
3.3V
Rs
R1
R2
330ohm
+/-5%
5%
Table 116. In Target Probe (ITP)
Pin Name
System
Pull-up/Pull-down
Series
Termination
Resistor
(Ω)
Notes √
BPM[5:0]# Connect to processor directly.
DBR#
150-240
Ω pull-up
to VCC3
When using ITP on interposer card, DBR# shall
also be connected to DBR# pin at the processor.
The 150-240 Ω pull-up resistor shall be placed
within 1 ns of the ITP700FLEX connector. The
CPU shall
not be power cycled when DBR# is
asserted.
RESET#
220
Ω ± 5 % pull-up
to VCCP when
using ITP700FLEX
22.6 Ω ±1%
from pull-up to
ITP700FLEX
Refer to the RESET# notes in Table 115.
FBO
Connect to TCK pin of processor. Refer to
Section 4.3.1.1 for layout details.
TCK
27.4
Ω ± 1%
pull-down to GND
Connect to processor, with resistor placed by ITP.
Refer to Section 4.3.1.1 for layout details.
TDI
150
Ω pull-up to
VCCP
Connect to processor with resistor placed by the
processor. Refer to Section 4.3.1.1 for layout
details.
TDO
54.9
Ω ±1% pull-up
to VCCP
22.6
Ω ±1%
from pull-up to
ITP700FLEX
Connect to processor with resistors placed by ITP.
When ITP not used, this signal may be left as NC.
TMS
39.2
Ω ± 1% pull-up
to VCCP
Connect to processor with resistor placed by ITP.
TRST#
680
Ω pull-down to
GND
Connect to processor with resistor located
anywhere between processor and ITP.
V T A P ,
VTT[1:0]
Connect to VCCP
One 0.1 µF decoupling cap near ITP is required.
Refer to Section 4.3.1.1 for layout details.

Intel 855GME Specifications

General

Brand	Intel
Model	855GME
Category	Computer Hardware
Language	English