Chapter 2
Platform Configuration Module (PCM)
2.1 PCM memory map and register descriptions
The Platform Configuration Module contains three miscellaneous configuration registers
for the chip. Currently, the configuration registers are related to the operation of the FEC
and intelligent bus bridging gasket. The module is mapped to AIPS_0 (PBRIDGE_B) on-
platform slot 27 with a base address of FFF6_C000h.
NOTE
These registers can be accessed only in supervisor mode.
PCM memory map
Address
offset (hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
0
FEC Burst Optimization Master Control Register
(PCM_FBOMCR)
32 R/W 0000_0000h 2.1.1/12
4 Bus Bridge Configuration Register 1 (PCM_IAHB_BE1) 32 R/W 0707_0707h 2.1.2/13
8 Bus Bridge Configuration Register 2 (PCM_IAHB_BE2) 32 R/W 0707_0707h 2.1.3/16
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
Freescale Semiconductor, Inc. 11
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