Table 3-55. Standard Message ID Filter Element Field Description
S0 Bits 31:30 SFT[1:0]: Standard Filter Type
00 Range filter from SFID1 to SFID2 (SFID2 >= SFID1)
01 Dual ID filter for SFID1 or SFID2
10 Classic filter: SFID1 = filter, SFID2 = mask
11 Reserved
S0 Bits 29:27 SFEC[2:0]: Standard Filter Element Configuration
All enabled filter elements are used for acceptance filtering of standard frames. Acceptance filtering
stops at the first matching enabled filter element or when the end of the filter list is reached. If SFEC
= 100, 101, or 110 a match sets interrupt flag IR[HPM] and, if enabled, an interrupt is generated.
In this case register HPMS is updated with the status of the priority match.
000 Disable filter element
001 Store in Rx FIFO 0 if filter matches
010 Store in Rx FIFO 1 if filter matches
011 Reject ID if filter matches
100 Set priority if filter matches
101 Set priority and store in FIFO 0 if filter matches
110 Set priority and store in FIFO 1 if filter matches
111 Store into Rx Buffer or as debug message, configuration of SFT[1:0] ignored
S0 Bits 26:16 SFID1[10:0]: Standard Filter ID 1
First ID of standard ID filter element.
When filtering for Rx Buffers or for debug messages this field defines the ID of a standard message
to be stored. The received identifiers must match exactly, no masking mechanism is used.
S0 Bits 10:0 SFID2[10:0]: Standard Filter ID 2
Overall, this bit field has a different meaning depending on the configuration of SFEC:
SFEC = 001...110 Second ID of standard ID filter element
SFEC = 111 Filter for Rx Buffers or for debug messages
SFID2[10:9]: Decides whether the received message is stored into an Rx Buffer or treated as
message A, B, or C of the debug message sequence.
00 Store message into an Rx Buffer
01 Debug Message A
10 Debug Message B
11 Debug Message C
SFID2[8:6]: Is used to control the M_CAN filter event pins at the Extension Interface. A one at the
respective bit position enables generation of a pulse at the related filter event pin with the duration
of one Host clock period in case the filter matches.
SFID2[5:0]: Defines the offset to the Rx Buffer Start Address RXBC.RBSA for storage of a matching
message.
Chapter 3 Modular CAN (M_CAN)
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
Freescale Semiconductor, Inc. 85
To Next Page
Loading...
