M_CAN_SIDFC field descriptions (continued)
Field Description
NOTE: This field has Protected Write status.
0 No standard Message ID filter
1-128 Number of standard Message ID filter elements
>128 Values greater than 128 are interpreted as 128
16–29
FLSSA
Filter List Standard Start Address
Start address of standard Message ID filter list (32-bit word address, see Message RAM).
NOTE: This field has Protected Write status.
30–31
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
3.3.20 Extended ID Filter Configuration Register (M_CAN_XIDFC)
Settings for 29-bit extended Message ID filtering. The Extended ID Filter Configuration
controls the filter path for the standard messages as described in Extended Message ID
Filtering.
Address: 0h base + 88h offset = 88h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
LSE FLESA
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
M_CAN_XIDFC field descriptions
Field Description
0–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
9–15
LSE
List Size Extended
NOTE: This field has Protected Write status.
0 No extended Message ID filter
1-64 Number of extended Message ID filter elements
>64 Values greater than 64 are interpreted as 64
16–29
FLESA
Filter List Extended Start Address
Start address of extended Message ID filter list (32-bit word address, see Message RAM).
NOTE: This field has Protected Write status.
30–31
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Memory Map and Register Description
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
58 Freescale Semiconductor, Inc.
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