NXP Semiconductors MPC5777C Reference Manual

3.3.44 Tx Event FIFO Status Register (M_CAN_TXEFS)
Address: 0h base + F4h offset = F4h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 TEFL EFF 0 EFPI
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 EFGI 0 EFFL
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
M_CAN_TXEFS field descriptions
Field Description
0–5
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
TEFL
Tx Event FIFO Element Lost
This bit is a copy of interrupt flag IR[TEFL]. When IR[TEFL] is reset, this bit is also reset.
0 No Tx Event FIFO element lost
1 Tx Event FIFO element lost, also set after write attempt to Tx Event FIFO of size zero
7
EFF
Event FIFO Full
0 Tx Event FIFO not full
1 Tx Event FIFO full
8–10
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
11–15
EFPI
Event FIFO Put Index
Tx Event FIFO write index pointer, range 0 to 31.
16–18
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
19–23
EFGI
Event FIFO Get Index
Tx Event FIFO read index pointer, range 0 to 31.
24–25
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
26–31
EFFL
Event FIFO Fill Level
Number of elements stored in Tx Event FIFO, range 0 to 32.
Chapter 3 Modular CAN (M_CAN)
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
Freescale Semiconductor, Inc. 77

NXP Semiconductors MPC5777C Specifications

General

Brand	NXP Semiconductors
Model	MPC5777C
Category	Motherboard
Language	English