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NXP Semiconductors MPC5777C Reference Manual

NXP Semiconductors MPC5777C
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2.1.1 FEC Burst Optimization Master Control Register
(PCM_FBOMCR)
This register controls FEC burst optimization behavior on the system bus.
Address: 0h base + 0h offset = 0h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
ACCERR
WBEN
RBEN FXSBE[7:0]
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
PCM_FBOMCR field descriptions
Field Description
0–20
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
21
ACCERR
Accumulate Error
This field determines whether an error response for the first half of the write burst is accumulated to the
second half of the write burst or discarded. To complete the burst, the FEC interface to the system bus
responds by indicating that the first half of the burst completed without error before it actually writes the
data so that it can fetch the second half of the write data from the FIFO. When actually written onto the
system bus, the first half of the write burst can have an error. Because this half initially responded without
an error to the FIFO, the error is discarded or accumulated with the error response for the second half of
the burst.
0 Any error to the first half of the write burst is discarded.
1 Any actual error response to the first half of the write burst is accumulated in the second half's
response. In other words, an error response to the first half is seen in the response to the second half,
even if the second half does not contain an error.
22
WBEN
Global write burst enable to XBAR slave port designated by FXSBEn
0 Write bursting to all XBAR slave ports is disabled.
1 Write bursting is enabled to any XBAR slave port whose FXSBEn bit is 1.
23
RBEN
Global read burst enable from XBAR slave port designated by FXSBEn
0 Read bursting from all XBAR slave ports is disabled.
1 Read bursting is enabled from any XBAR slave port whose FXSBEn bit is 1.
Table continues on the next page...
PCM memory map and register descriptions
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
12 Freescale Semiconductor, Inc.

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NXP Semiconductors MPC5777C Specifications

General IconGeneral
BrandNXP Semiconductors
ModelMPC5777C
CategoryMotherboard
LanguageEnglish

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