NXP Semiconductors MPC5777C - Tx Buffer Request Pending Register (MCANTXBRP)

M_CAN_TXESC field descriptions (continued)
Field Description
000 8 byte data field
001 12 byte data field
010 16 byte data field
011 20 byte data field
100 24 byte data field
101 32 byte data field
110 48 byte data field
111 64 byte data field
3.3.36 Tx Buffer Request Pending Register (M_CAN_TXBRP)
NOTE
TXBRP bits which are set while a Tx scan is in progress are not
considered during this particular Tx scan. In case a cancellation
is requested for such a Tx Buffer, this Add Request is cancelled
immediately, the corresponding TXBRP bit is reset.
Address: 0h base + CCh offset = CCh
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
TRP
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
M_CAN_TXBRP field descriptions
Field Description
0–31
TRP
Transmission Request Pending
Each Tx Buffer has its own Transmission Request Pending bit. The bits are set via register TXBAR. The
bits are reset after a requested transmission has completed or has been cancelled via register TXBCR.
TXBRP bits are set only for those Tx Buffers configured via TXBC. After a TXBRP bit has been set, a Tx
scan (see Tx Handling) is started to check for the pending Tx request with the highest priority (Tx Buffer
with lowest Message ID).
A cancellation request resets the corresponding transmission request pending bit of register TXBRP. In
case a transmission has already been started when a cancellation is requested, this is done at the end of
the transmission, regardless whether the transmission was successful or not. The cancellation request bits
are reset directly after the corresponding TXBRP bit has been reset.
After a cancellation has been requested, a finished cancellation is signaled via TXBCF
• after successful transmission together with the corresponding TXBTO bit
• when the transmission has not yet been started at the point of cancellation
• when the transmission has been aborted due to lost arbitration
• when an error occurred during frame transmission
Memory Map and Register Description
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
72 Freescale Semiconductor, Inc.