NXP Semiconductors MPC5777C - Timestamp Counter Configuration Register (MCANTSCC); Timestamp Counter Value Register (MCANTSCV)

3.3.8 Timestamp Counter Configuration Register (M_CAN_TSCC)
For a description of the Timestamp Counter see Timestamp Generation
Address: 0h base + 20h offset = 20h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
TCP
0
TSS
W
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
M_CAN_TSCC field descriptions
Field Description
0–11
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
12–15
TCP
Timestamp Counter Prescaler
(0x0-0xF)— Configures the timestamp and timeout counters time unit in multiples of CAN bit times [1…
16]. The actual interpretation by the hardware of this value is such that one more than the value
programmed here is used.
NOTE: This field has Protected Write status.
NOTE: With CAN FD, timestamp generation is not supported.
16–29
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
30–31
TSS
Timestamp Select
NOTE: This field has Protected Write status.
00 Timestamp counter value always 0x0000
01 Timestamp counter value incremented according to TCP
10 Reserved
11 Same as 00
3.3.9 Timestamp Counter Value Register (M_CAN_TSCV)
Address: 0h base + 24h offset = 24h
Bit 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 TSC
W
w1c
Reset
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Memory Map and Register Description
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
38 Freescale Semiconductor, Inc.