Contents
Section number Title Page
Chapter 1
Preface
1.1 Overview...........................................................................................................................................................................7
1.2 Device versions.................................................................................................................................................................7
1.3 Audience...........................................................................................................................................................................8
1.4 Document organization.....................................................................................................................................................8
1.5 Conventions......................................................................................................................................................................8
1.5.1 Numbering systems..............................................................................................................................................8
1.5.2 Typographic notation...........................................................................................................................................9
1.5.3 Special terms........................................................................................................................................................9
1.6 References.........................................................................................................................................................................10
Chapter 2
Platform Configuration Module (PCM)
2.1 PCM memory map and register descriptions....................................................................................................................11
2.1.1 FEC Burst Optimization Master Control Register (PCM_FBOMCR)................................................................12
2.1.2 Bus Bridge Configuration Register 1 (PCM_IAHB_BE1)..................................................................................13
2.1.3 Bus Bridge Configuration Register 2 (PCM_IAHB_BE2)..................................................................................16
Chapter 3
Modular CAN (M_CAN)
3.1 Chip-specific M_CAN information..................................................................................................................................19
3.1.1 M_CAN Message RAM allocation......................................................................................................................19
3.1.2 Introduction..........................................................................................................................................................19
3.1.3 Functional Description.........................................................................................................................................20
3.1.4 External Signals...................................................................................................................................................22
3.2 Overview...........................................................................................................................................................................23
3.2.1 Features................................................................................................................................................................23
3.2.2 Block Diagram.....................................................................................................................................................24
3.2.3 Dual Clock Sources..............................................................................................................................................26
MPC5777C Reference Manual Addendum, Rev. 1, 12/2015
Freescale Semiconductor, Inc. 3
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