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Sequence Input Instructions Section 3-3
Description AND NOT is used for a normally closed bit connected in series. AND NOT
cannot be directly connected to the bus bar, and cannot be used at the begin-
ning of a logic block. If there is no immediate refreshing specification, the
specified bit in I/O memory is read. If there is an immediate refreshing specifi-
cation, the status the Basic Input Unit’s input terminals is read.
Flags There are no flags affected by this instruction.
Precautions Immediate refreshing (!) can be specified for AND NOT. An immediate refresh
instruction updates the status of input bit just before the instruction is exe-
cuted from Basic Input Units (but not for Basic Input Units on Slave Racks or
for C200H Group 2 Multi-point Input Units).
Example
Holding Bit Area H00000 to H51115
Auxiliary Bit Area A00000 to A95915
Timer Area T0000 to T4095
Counter Area C0000 to C4095
Task Flag Area TK0000 to TK0031
Condition Flags ER, CY, N, OF, UF, >, =, <, >=, <>, <=, ON, OFF, AER
Clock Pulses 0.02 s, 0.1 s, 0.2 s, 1 s, 1 min
TR Area ---
DM Area ---
EM Area without bank ---
EM Area with bank ---
Indirect DM/EM
addresses in binary
---
Indirect DM/EM
addresses in BCD
---
Constants ---
Data Registers ---
Index Registers ---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area AND NOT bit operand
Instruction Operand
LD 000000
AND 000001
LD 000002
AND 000003
LD 000004
AND NOT 000005
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