Omron SYSMAC CJ - REFERENCE MANUAL 08-2008

657
Double-precision Floating-point Instructions (CS1-H, CJ1-H, CJ1M, or CS1D Only) Section 3-16
3-16-1 DOUBLE FLOATING TO 16-BIT: FIXD(841)
Purpose Converts a double-precision (64-bit) floating-point value to 16-bit signed
binary data and places the result in the specified result word.
This instruction is supported by CS1-H, CJ1-H, CJ1M, and CS1D CPU Units
only.
Ladder Symbol
Variations
Applicable Program Areas
Operand Specifications
FIXD(841)
S
D
S: First source word
D: Destination word
Variations Executed Each Cycle for ON Condition FIXD(841)
Executed Once for Upward Differentiation @FIXD(841)
Executed Once for Downward Differentiation Not supported.
Immediate Refreshing Specification Not supported.
Block program areas Step program areas Subroutines Interrupt tasks
OK OK OK OK
Area S D
CIO Area CIO 0000 to CIO 6140 CIO 0000 to CIO 6143
Work Area W000 to W508 W000 to W511
Holding Bit Area H000 to H508 H000 to H511
Auxiliary Bit Area A000 to A956 A448 to A959
Timer Area T0000 to T4092 T0000 to T4095
Counter Area C0000 to C4092 C0000 to C4095
DM Area D00000 to D32764 D00000 to D32767
EM Area without bank E00000 to E32764 E00000 to E32767
EM Area with bank En_00000 to En_32766
(n = 0 to C)
En_00000 to En_32767
(n = 0 to C)
Indirect DM/EM
addresses in binary
@ D00000 to @ D32767
@ E00000 to @ E32767
@ En_00000 to @ En_32767
(n = 0 to C)
Indirect DM/EM
addresses in BCD
*D00000 to *D32767
*E00000 to *E32767
*En_00000 to *En_32767
(n = 0 to C)
Constants ---
Data Registers --- DR0 to DR15
Index Registers ---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15