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Sequence Control Instructions Section 3-5
Variations
Applicable Program Areas The following table shows the applicable program areas for MILH(517),
MILR(518), and MILC(519).
Description When the execution condition for MILH(517) (or MILR(518)) with interlock
number N is OFF, the outputs for all instructions between that MILH(517)/
MILR(518) instruction and the next MILC(519) with interlock number N are
interlocked.
When the execution condition for MILH(517) (or MILR(518)) with interlock
number N is ON, the instructions between that MILH(517)/MILR(518) instruc-
tion and the next MILC(519) with interlock number N are executed normally.
Interlock Status
The following table shows the treatment of various outputs in an interlocked
section between MILH(517)/MILR(518) instruction and the next MILC(519).
Note 1. These instructions are supported by the CJ1-H-R CPU Units only.
2. Bits and words in all other instructions including TTIM(087), TTIMX(555),
MTIM(543), MTIMX(554), SET, RSET, CNT, CNTX(546), CNTR(012), CN-
TRX(548), SFT, and KEEP(011) retain their previous status.
Indirect DM/EM
addresses in BCD
--- ---
Constants 0 to 15 ---
Data Registers --- ---
Index Registers --- ---
Indirect addressing
using Index Registers
--- ,IR0 to ,IR15
ā2048 to +2047 ,IR0 to ā
2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
Area N D
Variations Interlocks when OFF/Does Not interlock when ON MILH(517) and
MILR(518)
Immediate Refreshing Specification Not supported
Variations Executed Each Cycle for ON Condition MILC(519)
Immediate Refreshing Specification Not supported
Block program areas Step program areas Subroutines Interrupt tasks
Not allowed Not allowed OK OK
Instruction Treatment
Bits specified in OUT, OUT NOT, or OUTB(534) OFF
TIM, TIMX(550), TIMH(015),
TIMHX(551), TMHH(540),
TMHHX(552), TIML(542), and
TIMXL(553)
Completion Flag OFF (reset)
PV Time set value (reset)
TIMU(541), TIMUX(556),
TMUH(544), and TMUHX(557)
(See note 1.)
Cannot be refer-
enced.
Bits/words specified in all other instructions (See note 2.) Retain previous status.