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Timer and Counter Instructions Section 3-6
Description CNR(545)/CNRX(547) resets the Completion Flags of all timers or counters
from N
1
to N
2
. At the same time, the PVs will all be set to the maximum value
(9999 for BCD and FFFF for binary). (The PV will be set to the SV the next
time that the timer or counter instruction is executed.)
Operation of CNR(545)
The following table shows the timer and counter instructions (with BCD PVs),
which are reset by CNR(545).
Operation of CNRX(547)
The following table shows the timer and counter instructions (with binary
PVs), which are reset by CNRX(547).
Constants --- ---
Data Registers --- ---
Index Registers --- ---
Indirect addressing
using Index Registers
,IR0 to ,IR15
–2048 to +2047 ,IR0 to –2048 to +2047 ,IR15
DR0 to DR15, IR0 to IR15
,IR0+(++) to ,IR15+(++)
,–(– –)IR0 to, –(– –)IR15
Area N
1
N
2
Instructions reset Operation of CNR(545)
TIM: HUNDRED-MS TIMER
TIMH(015): TEN-MS TIMER
TMHH(540): ONE-MS TIMER
TTIM(087): ACCUMULATIVE TIMER
TIMW(813): HUNDRED-MS TIMER WAIT
TMHW(815): TEN-MS TIMER WAIT
CNT: COUNTER
CNTR(012): REVERSIBLE COUNTER
CNTW(814): COUNTER WAIT
The PV is set to its maximum value
(9,999 BCD) and the Completion Flag
is turned OFF.
TIMU(541): TENTH-MS TIMER
TMUH(544): HUNDREDTH-MS TIMER
(TIMU(541) and TMUH(544) are supported
by CJ1-H-R CPU Units only.)
The Completion Flag is turned OFF.
(The PV cannot be read.)
Instructions reset Operation of CNR(545)
TIMX(550): HUNDRED-MS TIMER
TIMHX(551): TEN-MS TIMER
TMHHX(552): ONE-MS TIMER
TTIMX(555): ACCUMULATIVE TIMER
TIMWX(816): HUNDRED-MS TIMER WAIT
TMHWX(817):TEN-MS TIMER WAIT
CNTX(546): COUNTER
CNTRX(548): REVERSIBLE COUNTER
CNTWX(818):COUNTER WAIT
The PV is set to its maximum value
(FFFF hex) and the Completion Flag is
turned OFF.
TIMUX(556): TENTH-MS TIMER
TMUHX(557): HUNDREDTH-MS TIMER
(TIMUX(556) and TMUHX(557) are sup-
ported by CJ1-H-R CPU Units only.)
The Completion Flag is turned OFF.
(The PV cannot be read.)
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