Technology Modules
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After synchronization is successfully completed the STS_SYN status bit is set. This bit must be reset
by the RES_STS control bit.
Upper count limit
‚Load value
ƒLower count limit
„Synchronization without release
…Release set
†1. synchronization
‡2. synchronization
ˆStop synchronization
‰No synchronization
ŠRelease reset
Fig. 266: Synchronization with continuous counting
a
a
b
b
c
c
de f g hi f j
t
t
t
t
t
Periodical synchronization
Single-action synchronization
Software release
Synchronization release
DI synchronization