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12.5.8 Process output data
Field output data is output from the SSI-module to a field device.
The process output data is the data that is transferred by the PLC via a gateway to the SSI-module.
The transmission is realized in a 8-byte format which is structured as follows:
1 byte contains a Stop bit for interrupting communication with the encoder.
1 byte is used for controlling the comparison operations.
1 byte contains the register address of the data to be written to bytes 0…3 of this telegram and
a write request.
1 byte contains the register address for the data that is to be read with the next response tele-
gram.
4 bytes are used for representing the data that is to be written to the register with the address
specified at REG_WR_DATA.
n = offset of input data; depending on extension of station and the corresponding fieldbus.
REG_RD_ADR 0…63 Address of the register to be read. If the read operation is successful
(REG_RD_ABORT = 0), the user data is located in REG_RD_DATA of the
process input data (bytes 0 to 3).
REG_RD_DATA 0…2
32
-1 Content of the register to be read if REG_RD_ABORT=0.
If REG_RD_ABORT =1, then REG_RD_DATA=0.
Byte Byte
DP/PN
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Control data
n n + 7 STOP - - - - - - -
n + 1 n + 6 - - - CLR
CMP2
EN
CMP2
- CLR
CMP1
EN
CMP1
n + 2 n + 5 REG_WR - REG_WR_ADR
n + 3 n + 4 - - REG_RD_ADR
Data bytes
n + 4 n + 3 REG_WR_DATA, data byte 0
n + 5 n + 2 REG_WR_DATA, data byte 1
n + 6 n + 1 REG_WR_DATA, data byte 2
n + 7 n REG_WR_DATA, data byte 3
Designation Value Description
STOP 0 Request to read the SSI encoder cyclically
1 Request to interrupt communication with the encoder
EN_CMP1 0 Default status, i.e. the data bits REL_CMP1, STS_CMP1 and FLAG_C-
MP1 always have the value 0, irrespective of the actual SSI encoder
value.
1 Comparison active, i.e. the data bits REL_CMP1, STS_CMP1 and
FLAG_CMP1 always have a value based on the result of the compari-
son with the SSI encoder value.
Designation Value Description
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