Technology Modules
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CLR_CMP1 0 Default status, i.e. reset of FLAG_CMP1 not active.
1 Reset of FLAG_CMP1 active.
EN_CMP2 0 Default status, i.e. the data bits REL_CMP2, STS_CMP2 and FLAG_C-
MP2 always have the value 0, irrespective of the actual SSI encoder
value.
1 Comparison active, i.e. the data bits REL_CMP2, STS_CMP2 and
FLAG_CMP2 always have a value based on the result of the compari-
son with the SSI encoder value.
CLR_CMP2 0 Default status, i.e. no reset of FLAG_CMP2 active.
1 Reset of FLAG_CMP2 active.
REG_WR_ADR 0…63 Address of the register, which has to be written with REG_WR_DATA.
REG_WR 0 Default status, i.e. there is no request to overwrite the content of the
register with the address stated at REG_WR_ADR with REG_WR_-
DATA. Bit REG_WR_AKN is reset (0) if necessary.
1 Request to overwrite the content of the register with address
REG_WR_ADR with REG_WR_DATA.
REG_RD_ADR 0…63 Address of the register which has to be read. If the reading was suc-
cessful (REG_RD_ABORT = 0), the user data can be found in REG_RD_-
DATA in the status interface (bytes 4-7).
REG_WR_DATA 0…2
32
-1 Value which has to be written to the register with the address
REG_WR_ADR.
Designation Value Description
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