FIR–Filter prototype passband width: 0.503 MHz
Limits: 0.05 MHz ... 10.0 MHz
Pulse Width Hardware Control
These are the hardware control bits for this pulse width. The bits are the 4–bit binary pattern
that is output on PWBW0:3.
Bit Limits: 0 ... 15 (input must be typed in decimal)
Output control 4–bit pattern: 0001
Noise Levels
These questions allow you to set the current value and the power–up value of the receiver
noise level for either a single or dual receiver system. These questions are intended for
applications in which RVP900 must operate with a reasonable default value, up until the
time that an SNOISE command is received. They may also be used to compare the receiver
noise levels during normal operation, which serves as a check that each FIR
filter is behaving
as expected when presented with thermal noise.
• The noise level(s) are shown in dBm, and you may alter either one from the TTY.
• The power–up levels are assigned by default when the RVP900 first starts, and when
the RESET opcode is issued with Bit #8 set.
• The current noise level is revised when the SNOISE opcode is issued.
Current noise levels – PriRx : -75.00 dBm, SecRx : -75.00 dBm Powerup
noise levels – PriRx : -75.00 dBm, SecRx: -75.00 dBm
-or-
Current noise level: -75.00 dBm Powerup noise level: -75.00 dBm
Phase Processing Transition Time
This is the transition time of the RVP900 phase control output lines during random phase
processing modes.
Select the switch point so that there is adequate settling time prior to the burst/COHO
phase measurement on each pulse.
This question appears if the PHOUT[0:7] lines are configured for phase control. See 5.2.2
Mc — Top-level Configuration (page 102).
Limits: -500 μsec ... 500 μsec
Chapter 5 – TTY Non-volatile Setups
121
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