Algorithm Description
Primary processing modes • Poly-Pulse Pair (PPP)
• DFT
• Random or phase coded second trip echofiltering/recovery
• Optional polarization with full co-variance matrix (Zdr, PHIDP, LDR,
RHOHV, and so on.)
• Optional pulse compression
Processing options • Azimuth averaging: 2 ... 1024 pulses
• Corrections for gaseous attenuation and1/R2
• Dual polarization: Alternating, simultaneous, H-only, V-only
• Fixed, adaptive width, and GMAP clutter filters in DFT and phase coded
second tripmode
• High sensitivity Rhv STAR mode processing: >3dB improvement in
detectability
• Pulse integration up to1024
• Range de-aliasing: phase coding method (random phase for magnetron) or
frequency coding method (not available for magnetron)
• Scan angle synchronization for data acquisition
• Up to 4 pulse widths
• Velocity de-aliasing: dual PRF velocity unfolding at 3:2, 4:3, and 5:4 PRF
ratios or dual PRT velocity processing for selectable inter-pulse intervals
Data outputs (8 and 16 bit)
Zh, Zv, Zhv, V, W, SQI, ZDR, LDR, RHOHV, PHIDP, and KDP
Optional data outputs HCLASS, I/Q
Data quality thresholds • Signal-to-noise ratio (SNR)—Used to reject bins having weak signals;
typically applied to dBZ
• Signal quality index (SQI)—Used to reject bins having incoherent signals;
typically applied to mean velocity and width
• Clutter-to-signal ratio (CSR)—Used to reject range bins having very strong
clutter; typically applied to mean velocity, width, and dBZ
• Speckle Filter—Removes single-bin targets such as aircraft or noise and fills
isolated missing pixels
9.3 RVP900 Input and Output Summary
Table 74 I/O Summary
Function Description
AZ/EL angle input options • Serial AZ/EL angle tag input using standard Vaisala RCP format
• 16-bit each parallel TTL binary angles through the I/O-62 card
• Synchro angle inputs through the I/O-62 card
• RCP network antenna packet protocol
Ethernet I/O from host
computer
Data output of calibrated dBZ, V, and W during normal operation.
Full I/Q time series recording with a separate tsarchive utility, or through a
custom application using a public API. Signal processor configuration and
verification read-back is performed through the Ethernet interface.
Input from RVP901 IFDR • 16-bit I/Q samples
• Optional dual-channel I/Q samples (for example, for polarization systems
or dual frequencysystems)
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