Vaisala RVP900 - RVP901 IFDR Data Capture and Timing; Figure 2 if to I;Q Processing Steps

Figure 2 IF to I/Q Processing Steps
More Information
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RVP900 Product Architecture (page 15)
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RVP901 IFDR Hardware (page 54)
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RVP901 IFDR Specifications (page 331)
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RVP901 IFDR Technical Drawings (page 369)
3.1.1
RVP901 IFDR Data Capture and Timing
RVP901 IFDR handles digital input and output, such as triggers, polarization switch controls,
and pulse width control.
Input
The primary input to the RVP901 IFDR is the received IF signal. The RVP901 IFDR has
five 16-
bit A/D converters to sample the transmit pulse and up to 4 receiver channels.
An external clock may be used to phase lock the A/D conversion with the transmit pulse
(not used for magnetron systems). Alternatively, the stable internal clock of the IFDR can be
used as the reference clock for the entire radar system.
RVP900 User Guide M211322EN-J
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