15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
---------------------------------------------------------------
| | | | | | | | | | | | | | | | |
| 16–Bit AFC Level | AFC–16
|----------------------------------------------------------------|
Level Description
01111111111111111
(most positive AFC voltage)
0000000000000000
(center AFC voltage)
1000000000000000
(most negative AFC voltage)
When the IFDR is jumpered for phase locking to an external reference clock, then Bit #22
is clear and the data word conveys the PLL clock ratio, and the Positive/Negative deviation
sign of the Voltage Controlled Crystal Oscillator (VCXO). This format is commonly used with
klystron systems, especially when the RVP900 is locking to an external trigger.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
---------------------------------------------------------------
| | | | | | | | | | | | | | | | |
| |Pos| Numerator – 1 | Denominator – 1 | PLL–16
|---|---|----------------------------|---------------------------|
The AFC-16 and PLL-16 formats cannot be interleaved for use at the same time, since there
would be no way to distinguish them at the receiving end.
An expanded format has been defined to handle future requirements of the serial uplink.
Bit #22 is set in this case, and the data word is interpreted as a 4-bit command and 12-bit
data value. A total of 16x12=192 auxiliary data bits are available through sequential
transmission of one or more of these words. The CMD/DATA words can also be used along
with one of the AFC-16 or PLL-16 formats, since Bit #22 marks them
dierently.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
---------------------------------------------------------------
| | | | | | | | | | | | | | | | |
| Command | Data | CMD/DATA
|-----------|----------------------------------------------------|
Chapter 4 – RVP Hardware
83
To Next Page
Loading...