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Vaisala RVP900 - Page 92

Vaisala RVP900
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Processes and Threads:
RVP9Proc-0 – PID:6917Priority:10 Policy:RealTimeRR
RVP9Proc-1 – PID:6918 Priority:10 Policy:RealTimeRR
Chat/Plot – PID:6909Priority:10 Policy:RealTimeRR
Watchdog – PID:6909Priority:10 Policy:RealTimeRR
Burst/AFC – PID:6909Priority:10 Policy:RealTimeRR
HostCmds – PID:6909Priority:11 Policy:RealTimeRR
Angles – PID:6909Priority:12 Policy:RealTimeRR
RtCtrl-0 – PID:6909Priority:12 Policy:RealTimeRR
RtCtrl-1 – PID:6909Priority:12 Policy:RealTimeRR
IQ-Data – PID:6909 Priority:13 Policy:RealTimeRR
This section provides RVP900 developers with information about code resources.
Shared library build dates:
RVP9/Main/Core:MonApr216:01:12EDT2012
RVP9/Main/Open:MonApr216:01:13EDT2012
RVP9/Main/Site:MonApr216:01:12EDT2012
RVP9/Proc/Core:MonApr216:01:14EDT2012
RVP9/Proc/Open:MonApr216:01:16EDT2012
RVP9/Proc/Site:MonApr216:01:14EDT2012
This line shows the status of optional GPS time synchronization of the RVP900 triggers and
range bins.
GPS:Inused
AFC indicates the level and status of the AFC voltage at the IFDR module. The number is the
present output level in D-Units ranging from -100 to +100. The shorter “%” symbol is used
since percentage units correspond in a natural way to the D-Units.
Burst Pwr indicates the mean power within the full window of burst samples. DC
osets
in the A/D converter do not aect the computation of the power, that is, the value shown
truly represents the waveform’s (Signal+Noise) energy. Freqindicates the mean frequency
of the burst, derived from a fourth order correlation model. See 6. Plot-assisted Setups
(page 129).
AFC:0.00% (Disabled), Burst Pwr:–48.6 dBm, Freq:30.000 MHz
AFC :0.00 % (Disabled), Burst Pwr :–48.6 dBm , Freq:30.000 MHz
This line shows the case temperature and FPGA chip core temperature, both in °C and °F.
IFD Temperature – Chassis: 37C (99F), FPGA: 38C (100F) )
RVP900 User Guide M211322EN-J
90

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