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15 – 46
rounding is unbiased, except on the ADSP-217x, ADSP-218x, and ADSP-
21msp58/59 processors, which offer a biased rounding mode. For a
discussion of biased vs. unbiased rounding, see “Rounding Mode” in the
“Multiplier/Accumulator” section of Chapter 2, Computation Units.
Status Generated:
ASTAT: 7 6 5 43210
SS MV AQ AS AC AV AN AZ
–*––––––
MV Set on MAC overflow (if any of the upper 9 bits of MR are
not all one or zero). Cleared otherwise.
Instruction Format:
(xop
*
yop) Conditional ALU/MAC Operation, Instruction Type 9:
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 0 Z AMF Yop Xop 0 0 0 0 COND
AMF: Specifies the ALU or MAC Operation. In this case,
AMF FUNCTION Data Format X-Operand Y-Operand
0 1 1 0 0 MR–xop * yop (SS) Signed Signed
0 1 1 0 1 MR–xop * yop (SU) Signed Unsigned
0 1 1 1 0 MR–xop * yop (US) Unsigned Signed
0 1 1 1 1 MR–xop * yop (UU) Unsigned Unsigned
0 0 0 1 1 MR–xop * yop (RND) Signed Signed
Z: Destination register Yop: Y operand register
Xop: X operand register COND: condition
(xop
*
xop) Conditional ALU/MAC Operation, Instruction Type 9:
(ADSP-217x, ADSP-218x, ADSP-21msp58/59 only)
23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 1 0 0 Z AMF 0 0 Xop 0 0 0 1 COND
AMF: Specifies the ALU or MAC Operation. In this case,
AMF FUNCTION Data Format X-Operand
0 1 1 0 0 MR–xop * xop (SS) Signed
0 1 1 1 1 MR–xop * xop (UU) Unsigned
0 0 0 1 1 MR–xop * xop (RND) Signed
MAC
MULTIPLY / SUBTRACT
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