Intel 386

E-17
INSTRUCTION SET SUMMARY
INTO:
Via interrupt or Trap Gate
To same privilege level
71 g, j, k, r
Via Interrupt or Trap Gate
To different privilege level
111 g, j, k, r
From 286 task to 286 TSS via Task Gate 384 g, j, k, r
From 286 task to Intel 386 SX CPU TSS via Task Gate 411 g, j, k, r
From 286 task to virtual 8086 mode via Task Gate 328 g, j, k, r
From Intel386 SX CPU task to 286 TSS via Task Gate Intel386
DX
g, j, k, r
From Intel386 SX CPU task to Intel 386 SX CPU TSS via task gate 413 g, j, k, r
From Intel386 SX CPU task to virtual 8086 mode via Task Gate 329 g, j, k, r
From virtual 8086 mode to 286 TSS via Task Gate 391 g, j, k, r
From virtual 8086 mode to Intel 386 SX CPU TSS via task gate 418 g, j, k, r
From virtual 8086 mode to privilege level 0 via trap gate or interrupt gate 223
BOUND:
Via interrupt or Trap Gate
To same privilege level
71 g, j, k, r
Via Interrupt or Trap Gate
To different privilege level
111 g, j, k, r
From 286 task to 286 TSS via Task Gate 358 g, j, k, r
From 286 task to Intel 386 SX CPU TSS via Task Gate 388 g, j, k, r
From 286 task to virtual 8086 mode via Task Gate 335 g, j, k, r
From Intel386 SX CPU task to 286 TSS via Task Gate 368 g, j, k, r
From Intel386 SX CPU task to Intel 386 SX CPU TSS via task gate 398 g, j, k, r
From Intel386 SX CPU task to virtual 8086 mode via Task Gate 347 g, j, k, r
From virtual 8086 mode to 286 TSS via Task Gate 368 g, j, k, r
From virtual 8086 mode to Intel 386 SX CPU TSS via task gate 398 g, j, k, r
From virtual 8086 mode to privilege level 0 via trap gate or interrupt gate 223
INTERRUPT RETURN
IRET = Interrupt return 1 1 0 0 1 1 1 1
24 g, h, j, k,
r
Protected Mode Only
(IRET)
To same privilege level (within task) 42 g, h, j, k,
r
Table E-1. Instruction Set Summary (Sheet 16 of 19)
Instruction Format
Clock Count Notes
Real
Ad-
dress
Mode
or
Virtual
8086
Mode
Pro-
tected
Virtual
Ad-
dress
Mode
Real
Ad-
dress
Mode
or
Virtual
8086
Mode
Pro-
tected
Virtual
Ad-
dress
Mode