Intel 386

E-19
INSTRUCTION SET SUMMARY
PREFIX BYTES
Address size prefix 0 1 1 0 0 1 1 1 0 0
LOCK = Bus lock prefix 1 1 1 1 0 0 0 0 0 0 m
Operand size prefix 0 1 1 0 0 1 1 0 0 0
Segment override prefix
CS: 0 0 1 0 1 1 1 0 0 0
DS: 0 0 1 1 1 1 1 0 0 0
ES: 0 0 1 0 0 1 1 0 0 0
FS: 0 1 1 0 0 1 0 0 0 0
GS: 0 1 1 0 0 1 0 1 0 0
SS: 0 0 1 1 0 1 1 0 0 0
PROTECTION CONTROL
ARPL = adjust requested privilege level
from register/memory 0 1 1 0 0 0 1 1 mod reg r/m N/A 20/21** a h
LAR = load access rights
from register/memory 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 0 mod reg r/m N/A 15/16* a g, h, j, p
LGDT = load global descriptor
table register 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 mod 0 1 0 r/m 11* 11* b, c h, l
LIDT = load interrupt descriptor
table register 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 mod 0 1 1 r/m 11* 11* b, c h, l
LLDT = load local descriptor
table register to
register/memory
0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 mod 0 1 0 r/m
N/A 20/24* a g, h, j, l
LMSW = load machine status word
from register/memory 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 mod 1 1 0 r/m 10/13 10/13* b, c h, l
LSL = load segment limit
from register memory 0 0 0 0 1 1 1 1 0 0 0 0 0 0 1 1 mod reg r/m
Byte-Granular limit
Page-Granular limit
N/A
N/A
20/21*
25/26*
a
a
g, h, j, p
g, h, j, p
LTR = load task register
from register/memory 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 mod 0 0 1 r/m N/A 23/27* a g, h, j, l
SGDT = store global descriptor
table register 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 1 mod 0 0 0 r/m 9* 9* b, c h
SIDT = store interrupt descriptor
Table E-1. Instruction Set Summary (Sheet 18 of 19)
Instruction Format
Clock Count Notes
Real
Ad-
dress
Mode
or
Virtual
8086
Mode
Pro-
tected
Virtual
Ad-
dress
Mode
Real
Ad-
dress
Mode
or
Virtual
8086
Mode
Pro-
tected
Virtual
Ad-
dress
Mode