Appendix D: Status model Series 2280 Precision DC Power Supply Reference Manual
D-20 077085503 / March 2019
Event registers
Each status register set has an event register. When an event occurs, the appropriate event register
bit sets to 1. The bit remains latched to 1 until the register is reset. Reading an event register clears
the bits of that register. The *CLS command resets all the event registers.
The commands to read the event registers are described in STATus subsystem (on page 7-94).
Event enable registers
Each status register has an enable register. Each event register bit is logically ANDed (&) to a
corresponding enable bit of an enable register. Therefore, when an event bit is set and the
corresponding enable bit is set (as programmed by the user), the output (summary) of the register will
set to 1.
The commands to program and read the event enable registers are described in STATus subsystem
(on page 7-94).
Condition registers
The Series 2280 has the following condition registers:
Operation Instrument Summary Condition Register
Questionable Instrument Summary Condition Register
Measurement Instrument Summary Condition Register
A condition register is a real-time, read-only register that constantly updates to reflect the present
operating conditions of the instrument. For example, while the Series 2280 is in the idle state, bit B10
(idle) of the Operation Instrument Summary Condition Register will be set. When the instrument is
taken out of the idle state, bit B10 clears.
Queues
The instrument includes an Output Queue and an Error Queue. The Output Queue holds messages
from readings and responses. The Error Queue holds error messages from the event log. Both are
first-in, first-out (FIFO) registers.
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