Omron SYSMAC CJ - REFERENCE MANUAL 08-2008 - Page 1332

1292
CS-series Instruction Execution Times and Number of Steps Section 4-1
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
4-1-8 Increment/Decrement Instructions
Note When a double-length operand is used, add 1 to the value shown in the length
column in the following table.
SHIFT N-BIT
DATA RIGHT
NSFR 579 4 7.5 8.3 10.5 10.5 Shifting 1 bit
50.5 55.3 69.3 69.3 Shifting 1,000
bits
SHIFT N-BITS
LEFT
NASL 580 3 0.22 0.32 0.29 0.37 ---
DOUBLE
SHIFT N-BITS
LEFT
NSLL 582 3 0.40 0.56 0.50 0.67 ---
SHIFT N-BITS
RIGHT
NASR 581 3 0.22 0.32 0.29 0.37 ---
DOUBLE
SHIFT N-BITS
RIGHT
NSRL 583 3 0.40 0.56 0.50 0.67 ---
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (µs) Conditions
CPU-6@HCPU-4@HCPU-6@ CPU-4@
INCREMENT
BINARY
++ 590 2 0.22 0.32 0.29 0.37 ---
DOUBLE
INCREMENT
BINARY
++L 591 2 0.40 0.56 0.50 0.67 ---
DECREMENT
BINARY
– – 592 2 0.22 0.32 0.29 0.37 ---
DOUBLE DEC-
REMENT
BINARY
– –L 593 2 0.40 0.56 0.50 0.67 ---
INCREMENT
BCD
++B 594 2 6.4 4.5 7.4 7.4 ---
DOUBLE
INCREMENT
BCD
++BL 595 2 5.6 4.9 6.1 6.1 ---
DECREMENT
BCD
– –B 596 2 6.3 4.6 7.2 7.2 ---
DOUBLE DEC-
REMENT BCD
– –BL 597 2 5.3 4.7 7.1 7.1 ---
Instruction Mnemonic Code Length
(steps)
(See note.)
ON execution time (µs) Conditions
CPU-6@HCPU-4@HCPU-6@ CPU-4@