212
Sequence Control Instructions Section 3-5
Note In CS1-H, CJ1-H, CJ1M, and CS1D (for Single-CPU System) CPU Units, the
Equals and Negative Flags are left unchanged.
In CS1 and CJ1 CPU Units, the Equals and Negative Flags are turned OFF.
Precautions The cycle time is not shortened when a section of the program is interlocked
because the interlocked instructions are executed internally.
The operation of DIFU(013), DIFD(014), and differentiated instructions is not
dependent solely on the status of the execution condition when they are pro-
grammed between IL(002) and ILC(003). Changes in the execution condition
for DIFU(013), DIFD(014), or a differentiated instruction are not recorded if the
DIFU(013) or DIFD(014) is in an interlocked section and the execution condi-
tion for the IL(002) is OFF.
In general, IL(002) and ILC(003) are used in pairs, although it is possible to
use more than one IL(002) with a single ILC(003) as shown in the following
diagram. If IL(002) and ILC(003) are not paired, an error message will appear
when the program check is performed but the program will be executed prop-
erly.
IL(002) and ILC(003) cannot be nested, as in the following diagram. (Use
MILH(517)/MILR(518) and MILC(519) when it is necessary to nest interlocks.)
Execution
condition
Program section
ab A B
OFF ON Interlocked Interlocked
OFF OFF Interlocked Interlocked
ON OFF Not interlocked Interlocked
ON ON Not interlocked Not interlocked
To Next Page
Loading...
